FPGA Engineer – Satellite Communications & DSP Systems – Bari, Apulia – €DOE
Pubblicato il 29-09-2026 - EVEREC in Bari
FPGA Engineer – Satellite Communications & DSP Systems – Bari, Apulia – €DOE
Verifichi che le sue competenze e la sua esperienza corrispondano ai requisiti di questo ruolo, quindi si candidi con il suo CV qui sotto.
Location: Bari, Apulia, Italy (Hybrid working available)
Salary: From €32,000 RAL + stock option plan
Overview:
A high-growth space technology company is seeking an experienced FPGA Engineer to join its core engineering team, developing next-generation satellite communication systems used across disaster response, emergency management, space monitoring, and defence applications.
This role sits at the heart of the company’s technology stack, with full ownership of FPGA-based digital architectures – from initial system definition through to hardware validation. You will work in a multidisciplinary team combining DSP, FPGA, RF, and embedded software expertise, contributing directly to mission‑critical satellite platforms.
Key Responsibilities:
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- FPGA Design & DSP Implementation
- Design and optimise advanced RTL architectures in VHDL for Xilinx Series‑7 and UltraScale+/FPGAs
- Implement and optimise DSP algorithms for digital and RF communication systems, including filtering, modulation/demodulation, and synchronisation
- Translate high‑level system and DSP requirements into efficient FPGA implementations
- Perform simulation, testing, debugging, and performance verification using FPGA simulation tools and hardware test benches
- Support timing constraint definition and timing closure in complex FPGA designs
- Validate designs on real hardware and contribute to system‑level performance analysis
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- System Integration
- Support integration across multiple hardware boards and subsystems
- Contribute to end‑to‑end system validation and bring‑up activities
- Collaborate closely with DSP, embedded software, and system engineers to ensure robust end solutions
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- Technical Documentation
- Produce clear technical documentation covering architectures, test results, and design decisions
- Support development traceability and knowledge sharing within the engineering team
Required Skills & Experience
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- Master’s degree in Electronic Engineering, Telecommunications, or a related discipline (PhD considered a strong plus)
- 4+ years of hands‑on experience in FPGA / RTL design using VHDL
- Strong understanding of DSP principles applied to digital communications
- Proven experience with Xilinx Vivado and simulation tools such as ModelSim / QuestaSim
- Solid background in hardware testing, debugging, and validation
- Strong problem‑solving mindset with the ability to work autonomously in a fast‑paced environment
- Fluent in technical English
Preferred Qualifications
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- Experience with SystemVerilog for advanced verification
- MATLAB / Simulink experience for DSP modelling and validation
- Python for test automation and scripting
- Knowledge of digital communication architectures and channel coding techniques xysqume
Working Pattern
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- Hybrid working model with flexible hours
- Onsite presence in Bari as required for system integration and validation activities
Why Join
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- Work on real‑world satellite systems with direct societal and strategic impact
- Join a technically strong, fast‑scaling space startup environment
- High ownership role with visibility across the full development lifecycle
- Competitive compensation package including equity participation
If this role is of interest, please apply via LinkedIn or contact for a confidential discussion.
Seniority level
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- Associate
Employment type
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- Full‑time
Job function
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- Aviation and Aerospace Component Manufacturing, Defense and Space Manufacturing, and Telecommunications
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