29 set - La Spezia
Nokia
pNokia seeks an experienced ASIC physical design engineer to implement floorplanning, place route, and power/clock distribution for submicron nodes.
You will work with a hardware/RTL team to translate designs into silicon and optimize flows.
/ppThis role emphasizes collaboration across cross-functional teams, verification rigor, and automation, with hybrid work and strong learning opportunities in latest nodes and tools.
/p #J-*****-Ljbffr
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