Junior Design Verification Engineer

01 ott - Italia
Amazon

Amazon Leo is seeking a Junior Design Verification Engineer to define and implement digital SOC verification for LEO satellites, contributing to high-speed wireless modem design and test environments. You will work with RTL, Matlab models, and UVM-based testbenches to drive coverage and ensure robust verification across CMOS generations.
The role emphasizes automated regression environments, collaboration with design and systems teams, and participation in system-level verification.
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Procedura pubblica selettiva per il reclutamento di un ricercatore con contratto di lavoro subordinato a tempo determinato ai sensi dell'art. 24, comma 3 della legge 30 dicembre 2010, n. 240 e ss.mm.ii.

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