Junior Design Verification Engineer – Wireless ASICs for LEO

03 ott - Asti
Amazon

Amazon Leo is seeking a Junior Design Verification Engineer to define and implement digital SOC verification for LEO satellites, contributing to high-speed wireless modem design and test environments. You will work with RTL, Matlab models, and UVM-based testbenches to drive coverage and ensure robust verification across CMOS generations.

The role emphasizes automated regression environments, collaboration with design and systems teams, and participation in system-level verification.

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