06 ott - San Michele All'adige
Xsight Labs
About the RoleScorra verso il basso per trovare i dettagli completi dell'offerta, inclusa l'esperienza richiesta e le mansioni associate.We are looking for a highly motivated Senior SerDes & High-Speed PHY Validation Engineer to play a key role in validating next-generation high-speed connectivity solutions for cloud, AI, and data center networking systems.In this role, you will lead the validation and characterization of advanced Ethernet SerDes technologies spanning 112G PAM4 and next-generation 224G PHY architectures. You will work at the intersection of silicon design, signal integrity, system engineering, and validation, driving complex technical investigations from first silicon bring-up through compliance and product readiness.This opportunity is ideal for engineers who enjoy combining deep signal integrity knowledge, hands-on lab ownership, automation development, and cross-functional technical leadership to solve challenging high-speed design and validation problems.What You'll DoLead SerDes Validation and CharacterizationDrive end-to-end validation of high-speed Ethernet SerDes and PHY solutions across silicon, package, board, and system environments.Define and execute validation strategies for 112G PAM4 and next-generation 224G technologies.Develop characterization methodologies to assess performance, robustness, and design margins across operating conditions.Support silicon bring-up activities and root-cause analysis of complex system-level issues.Execute Advanced High-Speed MeasurementsPerform and analyze:Eye-diagram measurementsBER and margin analysisBathtub curve characterizationJitter decomposition (RJ, DJ,
TJ)CTLE and DFE performance evaluationTX FIR optimizationChannel loss and equalization analysisDebug Complex Signal Integrity ChallengesInvestigate and resolve performance limitations across:SiliconPackagePCB channelsConnectorsCablesEnd-to-end system interconnectsWork closely with design and architecture teams to translate lab findings into actionable design improvements.Validation AutomationWork with existing validation and data-analysis frameworks to improve test efficiency, repeatability, and coverage.Contribute to automation solutions that streamline test execution, data collection, analysis, and reporting.Collaborate with team members to enhance lab productivity and accelerate debug cycles.Work with Industry-Leading Test PlatformsConfigure and operate advanced Keysight validation equipment, including:BERTsHigh-speed oscilloscopesChannel emulatorsVector network analyzers (VNAs)Influence Next-Generation ProductsPartner closely with SerDes, PHY, SI/PI, package, board, and system design teams.Contribute to validation methodologies that will be used across future product generations.Provide technical recommendations that directly influence product performance and customer success.Drive Standards ComplianceExecute compliance and interoperability testing according to industry standards, including:IEEE 802.3cd, 802.3ck, and emerging IEEE P802.3dj Ethernet specificationsEthernet compliance and interoperability test methodologiesDocument and Communicate ResultsProduce clear validation plans, test reports, and technical recommendations.Present findings to engineering stakeholders and leadership teams.Drive issues to closure through data-driven analysis and collaboration.Required Qualifications5+ years of experience in SerDes validation, PHY validation, signal integrity,
or related high-speed design environments.Hands‑on experience validating high-speed PAM4‑based communication systems.Strong understanding of:PAM4 signalingBER measurements and margining techniquesJitter analysis and decompositionEqualization techniques (CTLE, DFE, FFE)Channel loss and signal integrity fundamentalsExperience operating high-speed lab equipment such as oscilloscopes, BERTs, VNAs, and related instrumentation.Strong automation and scripting skills using Python - advantage.Experience working in Linux environments - advantage.Ability to independently drive technical investigations and resolve complex validation issues.B.Sc. or M.Sc. in Electrical Engineering or a related field.Preferred QualificationsExperience with 112G Ethernet SerDes validation.Experience with 224G SerDes technologies.Familiarity with Ethernet and relevant IEEE standards.Experience with compliance and interoperability testing.Experience using Keysight validation platforms and automation APIs.Experience with SQL‑based data analysis.Experience with first‑silicon bring-up and characterization.Why Join Us?Work on Technology That MattersHelp develop the high-speed connectivity technologies powering next-generation AI infrastructure, cloud‑scale networking systems, and hyperscale data centers.Influence Product DirectionYour findings will directly impact silicon, PHY, package, and system‑level design decisions across multiple product generations.Solve Cutting-Edge Technical ChallengesWork on some of the industry's most advanced Ethernet and SerDes technologies, including emerging 224G architectures and future high‑bandwidth interconnect solutions.Join an Expert TeamCollaborate with experienced engineers across SerDes design, validation, signal integrity, systems, and architecture in a highly technical and innovation-driven environment. xysqume Access World-Class LabsWork with state‑of‑the‑art validation and measurement platforms to tackle the toughest high-speed networking challenges.#J-18808-Ljbffr
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BOGGI MILANO
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m.p.s. maresca
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Studio Valentini & Associati STP A.RL.