Junior Digital Verification Engineer
Pubblicato il 05-10-2026 - Robert Bosch in Milano
Overview
In this role you verify advanced mixed-signal and SoC ASICs within an international semiconductor team, using state-of-the-art verification methodologies and AI-assisted workflows. You will build scalable verification environments, drive first-time-right quality, and contribute across the full product lifecycle. You collaborate globally to shape innovative semiconductor solutions and continuously improve verification processes. This is an opportunity to impact product reliability and performance at Bosch Sensortec.
Retribuzione / Benefits
performance-related premio
additional benefits
career development opportunities
Responsabilità
Design and develop scalable verification environments for complex ICs to accelerate silicon bring-up
Apply advanced functional and formal verification techniques to validate digital designs
Collaborate with international engineering teams across locations
Participate across concept to qualification phases to influence semiconductor solutions
Document and improve verification processes and best practices for efficiency and knowledge sharing
Requisiti fondamentali
Experience in ASIC/SoC verification or a PhD in Electrical Engineering, Computer Science, or related field with a focus on semiconductor design and verification
Expertise in ASIC verification methodologies (UVM, formal verification, directed verification)
Development and debugging of verification environments for complex Mixed-Signal or SoC designs
Hands-on experience with state-of-the-art simulation, verification, and EDA tools
Analog and mixed-signal modeling techniques (e.g., wreal, MATLAB/Simulink, SystemC)
Power-aware verification and simulation methodologies (UPF)
Scripting and automation (Python, Tcl)
Interest in AI-assisted engineering workflows to improve verification efficiency and quality
Proficient English (C1)
Passion for technology, innovation, and quality
Curiosity and proactive mindset
Collaborative and international teamwork
UVM
Formal verification
Directed verification