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Senior Staff Engineer Analog Mixed-Signal Design

Pubblicato il 08-10-2026 - Infineon Technologies in Padova

WeAreIn for jobs that impact everyone's life. Join the thinkers, builders, and problem solvers behind tomorrow’s technology. As a Senior Engineer Analog Mixed-Signal Design on our Research & Development team, you'll have the opportunity to merge creativity with your technical expertise by shaping the future of technology, driving groundbreaking projects, and bringing new ideas to life. Are you in?
Your role
Key responsibilities in your new role
- Lead end-to-end ADC design – architecture definition, circuit implementation, and silicon bring-up of high-performance converters (SAR, Pipeline, Sigma-Delta, Flash, or hybrid topologies)
- Design critical analog/mixed-signal building blocks including OTAs, comparators, DACs, sample-and-hold circuits, references, and clocking/bias circuits with clear ownership of performance, power, area, and cost trade-offs
- Drive comprehensive pre-silicon verification – transistor-level to chip-level simulations, Monte Carlo, corner, and worst-case analyses – through to post-silicon lab characterization and debug




- Develop behavioral and architectural models of ADC and mixed-signal blocks using Python and/or MATLAB for system-level simulation and early design exploration
- Collaborate cross-functionally with digital design, physical design, and CAD teams to ensure successful tape-out, and interface with customers and product teams to align technical solutions with requirements
- Mentor junior and mid-level engineers, lead design reviews, and actively contribute innovative ideas based on state-of-the-art trends in mixed-signal and ADC design

Your profile
Qualifications and skills to help you succeed
- An M.Sc. or Ph.D. in Electrical Engineering, Microelectronics, or a related field
- 5+ years of hands-on industry experience in analog and mixed-signal IC design, with a proven track record of successful silicon tape-outs and product bring-up
- Deep expertise in one or more ADC architectures (SAR, Pipeline, Sigma-Delta, Flash, or hybrid top

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