MEMS Analog Mixed Signal Verification

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YOUR ROLEThe position is aimed at Mixed Signal verification engineer with previous experience in analog on top mixed and digital simulations of ASIC. The preferred seniority is 3 to 5 years of experience.
The candidate will be part of Mixed verification team of MEMS sGROUP and he/she/div will have the opportunity to follow all the ASIC verification process from specification definition up to final product industrialization.
The candidate responsibilities includes definition and development of verification test bench, development of verification components, test case development for simulation, debugging failures and creating simulation cases for various studies. As an experienced professional, work with the cutting-edge verification methodologies on Subsystem level and SoC level.
YOUR SKILLS & EXPERIENCESThe ideal candidate has a good knowledge of Analog custom circuit (e.g., ADC, DAC, comparators, ...), Modeling languages such as System Verilog RNM, Verilog-AMS, Analog Model def

Vedi l’offerta su Go Lavoro: golavoro.it/annuncio-lavoro/8ayes9