Principal HS Digital Design Engineer

Vedi l’offerta su Go Lavoro: golavoro.it/annuncio-lavoro/8b6ifb

Technical leader responsible for architecture and RTL development of high-speed digital subsystems for communication ICs and mixed-signal SoC products
Drive design reviews and quality standards
Support verification and implementation teams
Mentor design engineers
MSc or PhD in Electrical Engineering
~10+ years digital IC design experience
~ RTL design (Verilog/SystemVerilog)
~ High-speed digital IC design experience for communication or mixed-signal SoC products is required; Synthesis and timing analysis
~ Advanced CMOS node experience, including FinFET and/or FD-SOI, is required

Diversity, equity and inclusion is strongly established in our corporate culture and we firmly believe it makes us more successful as a company. All qualified applications will receive consideration for employment regardless of ethnic, national or social origin, gender, gender identity, sexual orientation, color, religion, age, physical and mental abilities.

Vedi l’offerta su Go Lavoro: golavoro.it/annuncio-lavoro/8b6ifb