ENGINEER, DESIGN
Pubblicato il 10-10-2026 - MICRON in Avezzano
Overview
In this role you will define, implement, verify, and validate NAND Flash digital logic features as a technical owner at Micron's NVEG. You will collaborate across architecture, firmware, datapath, analog, and test teams to deliver scalable and reliable logic solutions across technology generations. You will drive RTL development, verification, and post-silicon validation while supporting silicon bring-up and learning. The position combines architecture with hands-on design to influence product ramp and yield learning. This is a chance to shape high-impact memory technologies in a global, multi-functional environment.
Retribuzione / Benefits
- meal vouchers
- corporate welfare
- remote working days
- supplementary health insurance
- life coverage
- Employee Assistance Program
Responsabilità
- Own end-to-end development of logic features from architecture through RTL, verification, and post-silicon validation
- Translate system and firmware requirements into micro-architecture specifications and robust digital implementations
- Develop high-quality RTL and drive block-,
subsystem-, and full-chip verification including coverage and post-layout validation
- Collaborate with multi-functional teams to define interfaces, ensure integration quality, and optimize performance, power, and reliability
- Support silicon bring-up, debug, and root-cause analysis, contributing to yield learning and product ramp
Requisiti fondamentali
- M.S. or Ph.D. in Electrical Engineering, Electronics, or related field
- Strong experience in digital logic design and verification for complex SoCs or memory products
- Hands-on RTL design, gate-level verification, and simulation methodologies
- Solid understanding of system-level and micro-architectural design trade-offs (performance, power, reliability)
- Strong communication and problem-solving skills, with ability to work effectively in global multi-functional teams
- strong communication
- problem-solving
- ability to work in global