Senior Digital Design Engineer for MEMs ASIC

10 ott - Pavia
analog devices

Overview

In this role, you will lead block-level digital designs and verification, focusing on high-performance and power-efficient implementations. You will mentor junior engineers and interface with customers to translate requirements into technical solutions. The position emphasizes cross-functional collaboration to deliver cohesive digital systems. You will work within a team shaping technology at the Intelligent Edge, driving impactful outcomes for broad applications. Retribuzione / Benefits

competitive compensation and benefits work-life balance continuous learning opportunities mentorship from industry experts opportunity to work on cutting-edge projects Responsabilità





Lead block-level digital designs and verification activities Develop and implement complex digital systems with a focus on performance optimization Ensure timing closure and power optimization for critical design blocks Mentor junior engineers and provide technical guidance Interface with customers to understand requirements and present technical solutions Drive cross-functional collaboration to ensure cohesive system design Requisiti fondamentali

Digital Circuit Design: advanced expertise in complex digital design Timing Closure: strong capability to achieve timing closure on complex designs Power Optimization: practical experience optimizing digital designs for power efficiency Mixed-Signal Integration: ability to integrate digital blocks with analog/mixed-signal environments Digital Architecture: competence in block-level architecture design and implementation Verification Methodologies: thorough understanding of digital verification approaches and tools Mentoring Cross-functional collaboration Customer-facing communication Digital Circuit Design Timing Closure Power Optimization

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