Asset Performance Engineer
Pubblicato il 10-10-2026 - Strategic Micro Systems of NJ in Italia
At STMicroelectronics, we believe in the power of technology to drive innovation and make a positive impact on people, businesses, and society. As a global semiconductor company, our advanced technologies and chips form the hidden foundation of the world we live in today.
When you join ST, you will be part of a global business with more than 115 nationalities, present in 40 countries, and comprising over 50,000 diverse and dedicated creators and makers of technology around the world.
Developing technologies takes more than talent: it takes amazing people who understand collaboration and respect. People with passion and the desire to disrupt the status quo, drive innovation, and unlock their own potential.
Embark on a journey with us, where you can innovate for a future that we want to make smarter and greener, in a responsible and sustainable way. Our technology starts with you.
They must be proficient in performing a wide range of reliability stress tests, including Burn-In, HTRB, HV H3TRB, HTGB and other transistor-specific evaluations, to rigorously assess device durability,
estimate lifetime, and evaluate performance under diverse operating conditions. Experience in operating, calibrating, and maintaining reliability test equipment is crucial to ensure precise data acquisition and thorough analysis, which directly supports technology validation and continuous improvement efforts.
A deep understanding of transistor physics and common failure mechanisms is required to accurately diagnose and troubleshoot reliability issues, thereby contributing to enhanced device robustness and long‑term performance.
YOUR SKILLS & EXPERIENCES
~ Master degree in physics, material science or electrical/physical engineering.
~3 years of experience
~ Knowledge of reliability physics, semiconductor physics, electronic devices, and electrical characterization methods are required.
~ Supporting reliability test programs and executing defined test plans.
~ Hands‑on experience with transis