Principal Validation Engineer
Pubblicato il 12-10-2026 - Renesas Electronics in Catania
- Compensation: EUR 75,000 - EUR 100,000 - yearly
Job Description
The Post-Silicon Validation team within the Performance Computing Power Division is building a world-class organization of highly skilled engineers across multiple global sites. Our mission is to push the boundaries of silicon validation for industry-leading integrated circuits enabling high-power, high-efficiency power management systems.
We are committed to delivering the highest level of validation quality by continuously improving test coverage, measurement accuracy, repeatability, automation, and execution efficiency while reducing overall validation time.
As a Principal Validation Engineer, you will serve as a recognized technical leader within the organization, defining and driving validation strategies for complex power management products and technology platforms. You will play a key role in shaping validation methodologies, influencing product and system architectures, and ensuring every new product meets its electrical, functional, reliability, and performance requirements prior to production release.
Working closely with Design, Applications, Product Engineering, Quality, and System teams, you will lead the resolution of complex silicon and system-level challenges while supporting aggressive product development and New Product Introduction (NPI) schedules.
For our new Design Center in Catania, we are looking for a hands‑on technical leader who combines deep validation expertise with strategic thinking, thrives on innovation, enjoys solving complex technical challenges, and is committed to driving engineering excellence across the organization.
- Drive the validation of analog, digital, mixed‑signal, and power management ICs against electrical, functional, and performance specifications.
- Define and drive validation strategies, methodologies, and technical roadmaps across multiple products and technology platforms.
- Lead development of validation architectures, test frameworks, and