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CPU Micro-architect/RTL Designer

Pubblicato il 12-10-2026 - Qualcomm in Vercelli

Company
Qualcomm Europe, Inc. Italy Branch Office

Job Area
Engineering Group, Engineering Group > CPU Engineering

General Summary
Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age - and this is where you come in. We are hiring talented engineers for CPU RTL development targeted for high performance, low power devices. As a CPU Micro-architecture and RTL Design Engineer, you will work with chip architects to conceive of the micro-architecture, and also help with architecture/product definition through early involvement in the product life-cycle.

Roles And Responsibilities

-
- Performance exploration. Explore high performance strategies working with the CPU modeling team.
- Microarchitecture development and specification.



From early high-level architectural exploration, through micro architectural research and arriving at a detailed specification.
- RTL ownership. Development, assessment and refinement of RTL design to target power, performance, area and timing goals.
- Functional verification support. Help the design verification team execute on the functional verification strategy.
- Performance verification support. Help verify that the RTL design meets the performance goals.
- Design delivery. Work with multi-functional engineering team to implement and validate physical design on the aspects of timing, area, reliability, testability

Minimum Qualifications

-
- Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

OR

Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification,

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