Senior Principal Engineer

14 ott - Romano di Lombardia
ams OSRAM

- Technical authority responsible for defining broadband optical communication IC architectures and technology Roadmaps
- Defines architectures for broadband optical communication ICs and provides technical leadership for strategic developments
- Develop system and IC architectures
- Translate requirements into subsystem specifications
- Lead architecture trade-off analysis
- Support implementation teams through development and validation
- Participate in customer and technology roadmap discussions
- Guide engineering teams on architectural decisions
- MSc or PhD in Electrical Engineering or related field
- 15+ years semiconductor IC development experience
- Multiple successful broadband optical communication IC tape-outs in advanced CMOS nodes
- Broadband optical communication IC and PHY architectures, including high-speed optical links, electro-optical interfaces and link-level trade-offs; awareness of layout-dependent effects is an advantage
- TIA, VCSEL drivers, SerDes, PLL/CDR and ADC/DAC architectures
- Advanced CMOS node experience, including FinFET and/or FD-SOI,



is required
- MATLAB, Python and/or system modeling tools

Job description
- Technical authority responsible for defining broadband optical communication IC architectures and technology Roadmaps
- Defines architectures for broadband optical communication ICs and provides technical leadership for strategic developments
- Develop system and IC architectures
- Translate requirements into subsystem specifications
- Lead architecture trade-off analysis
- Support implementation teams through development and validation
- Participate in customer and technology roadmap discussions
- Guide engineering teams on architectural decisions

Profile description
- MSc or PhD in Electrical Engineering or related field
- 15+ years semiconductor IC development experience
- Multiple successful broadband optical communication IC tape-outs in advanced CMOS nodes
- Broadband optical communication IC and PHY architectures, i

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