15 ott - Cascina
Fondazione Chips-IT
We are seeking a CAD & EDA Flow Engineer to manage, optimize, and maintain our Electronic Design Automation (EDA) infrastructure. In this role, you will serve as the technical backbone for our R&D; teams, managing relationships with EDA vendors and foundries, and ensuring smooth PDK integration for advanced SoC design up to tape-out. The work can be carried out either in Pavia or in Bologna. KEY RESPONSIBILITIES: * Manage EDA tool procurement, licenses, and vendor relationships (Cadence, Synopsys, Siemens). * Install, configure, and maintain Process Design Kits (PDKs) across all design workflows (digital, analog and RF). * Act as the primary technical liaison with foundries for PDK installation and maintenance, design rule checks (DRC/LVS), and issue resolution. * Maintain and optimize EDA toolchains for synthesis, simulation, verification, and physical implementation. Experience on emulation systems is a plus. * Create and update internal trainings, technical documentation, scripts, and best practices for internal design teams. #J-18808-Ljbffr
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