15 ott - Italia
Elettrotecnica
NXP Semiconductors is seeking a Senior Layout Engineer to drive physical implementation of complex analog, mixed-signal ICs from floorplanning to tape-out.
You will collaborate across design, verification, and technology teams, mentor junior engineers, and help mitigate risks to ensure silicon delivers on performance and reliability. Fluent English required; extensive Cadence experience expected.
17 ott - Varese
Callimacus
17 ott - Modena
Seedtag
17 ott - Mantova
Novocure
17 ott - Chieti
Teoresi Group