Senior Digital Design Lead RTL/Signoff for High‑Speed IPs

16 ott - Pavia
Infineon Technologies

Infineon Technologies AG is looking for an experienced digital design leader in Pavia, Italy.

Dato l'elevato interesse per questa posizione, la preghiamo di candidarsi tempestivamente se il suo profilo è in linea con il ruolo.

You will lead the Digital Design team, oversee RTL design for advanced Analog/Mixed-Signal IPs, and collaborate with cross-functional teams to achieve design excellence.
A successful candidate should have over 10 years of experience in RTL design, expert-level Verilog/SystemVerilog skills, and a strong leadership mindset. xysqume

The role offers a competitive salary range between €57,600 and €79,200 annually.

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