16 ott - Roma
Dipartimento di Ingegneria e Architettura - Università degli Studi di Trieste
Organisation/Company Università degli Studi di Trieste Department Dipartimento di Ingegneria e Architettura Research Field Engineering » Electronic engineering Researcher Profile First Stage Researcher (R1) Positions Master Positions Application Deadline 19 Oct 2026 - 11:00 (Europe/Rome) Country Italy Type of Contract Temporary Job Status Not Applicable Offer Starting Date 9 Oct 2026 Is the job funded through the EU Research Framework Programme? Not funded by a EU programme Reference Number 2026-IDR-DIA-03 Is the Job related to staff position within a Research Infrastructure? No
Offer Description
Independent evaluation of the LEWIS platform with analysis of hardware, software, AI, and connectivity architectures, consistency verification with requirements and use cases, definition of KPIs, testing strategies, and acceptance criteria. Support for the integration and validation of AI algorithms on the platform, including embedded porting and functional verification. Resilience and performance analysis of edge-cloud connectivity,
technical maturity assessment, Go/No-Go recommendations, and verification of cybersecurity requirements, secure communications, device identity, and remote updates.
master's degree in class LM-32 - Computer Engineering, obtained no more than six years ago
Specific Requirements
scientific-professional curriculum suitable for carrying out the research activity; theses, scientific publications and other research products attached (maximum number of evaluable publications: 2; further elements considered useful in relation to the research programme to be carried out: Knowledge of programming embedded systems based on microcontrollers, System-on-Chip, or processors; Knowledge of machine learning systems and their development within embedded systems
Research Field Engineering » Electronic engineering
Additional Information
Additional comments
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