17 ott - Palermo
NXP Semiconductors
Principal Analog Layout Engineer / Layout Lead
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Job Description
NXP’s Smart Analog Interfaces is seeking a highly motivated Principal Analog Layout Engineer to join a dynamic team developing state-of-the-art analog and high-speed interface products. This role offers the opportunity to work on complex mixed-signal ICs for leading consumer and automotive applications while contributing to innovative custom silicon solutions.
The successful candidate will serve as both an
analog
layout lead for custom analog-on-top and digital-on-top projects
and a
hands-on analog block layout designer , collaborating closely with circuit designers, physical design engineers, and cross-functional teams to deliver high-quality products from concept through tapeout.
Key Responsibilities
Develop and lead block-level and top-level analog/mixed-signal layouts.
Drive floorplanning, power routing, ESD implementation, and chip integration.
Run and debug DRC, LVS, ERC, and extraction flows.
Collaborate with design, digital P&R;, IO, ESD, package, test, and PDK teams.
Provide layout schedules, technical leadership, and customer communication.
Identify layout risks and drive resolution of design and PDK issues.
Improve layout methodologies and automation.
Qualifications
BSEE or MSEE.
10+ years of custom analog/mixed-signal layout experience in deep sub-micron CMOS.
Expert in Cadence Virtuoso XL, Floorplanning, Constraint Driven Layout, and PVS DRC/LVS/ERC.
Strong knowledge of matching, common centroid, shielding, EM/IR, high-speed routing, parasitics, and DFM practices.
Proven experience leading analog-on-top and digital-on-top chip layouts.
Experience with floorplanning, power distribution, ESD, and multiple voltage domains.
Familiarity with PLL, OSC, ADC, DAC, LDO, Bandgap, and high-speed interface circuits.
Excellent communi
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