Senior Digital Design Lead RTL/Signoff for High‑Speed IPs
Infineon Technologies AG is looking for an experienced digital design leader in Pavia, Italy. You will lead the Digital Design team, oversee RTL design for advanced Analog/Mixed-Signal IPs, and collaborate with cross-functional teams to achieve design excellence.
A successful candidate should have over 10 years of experience in RTL design, expert-level Verilog/SystemVerilog skills, and a strong leadership mindset. The role offers a competitive salary range between €57,600 and €79,200 annually.
A successful candidate should have over 10 years of experience in RTL design, expert-level Verilog/SystemVerilog skills, and a strong leadership mindset. The role offers a competitive salary range between €57,600 and €79,200 annually.