Senior Digital Design Engineer
Pubblicato il 18-10-2026 - NXP Semiconductors in Rovigo
Senior Digital IC DesignerLocation: Milan, Italy – NXP Semiconductors
NXP Semiconductors is seeking a Senior Digital IC Designer to contribute to the development of advanced mixed-signal integrated circuits for automotive and industrial electrification applications. The successful candidate will play a key role in the design, implementation, and integration of digital subsystems, working closely with architects, verification engineers, and multidisciplinary development teams
Key ResponsibilitiesDigital Design and Implementation
- Develop RTL designs for complex digital blocks and subsystems using SystemVerilog/Verilog.
- Contribute to digital architecture definition together with senior designers and system architects.
- Analyze design trade-offs related to performance, power consumption, area, safety, and testability.
- Implement robust clocking, reset, and power management strategies.
- Support IP integration and subsystem-level development.
Design Quality and Verification Support
- Perform RTL verification activities, including simulation, lint, CDC, and synthesis checks.
- Collaborate closely with digital verification engineers to ensure specification coverage and design quality.
- Support timing closure and implementation activities.
- Participate in design reviews and contribute to sign-off readiness.
- Support silicon bring-up, debugging, characterization, and root-cause analysis.
Mixed-Signal and Product Development Collaboration
- Work effectively within mixed-signal project teams including analog designers, verification engineers, system architects, and application engineers.
- Contribute to requirements definition and technical feasibility analysis.
- Support multiple development phases from concept through production release.
- Promote reuse of digital IPs and design methodologies.
Functional Safety and Quality
- Contribute to the implementation of safety mechanisms in compliance with automotive standards.
- Support functional safety analysis and revi