SR ENGINEER, DESIGN Avezzano, L'Aquila, Italy Posted 20 hours ago
Pubblicato il 19-10-2026 - Micron Technology in Parma
SR ENGINEER, DESIGNAvezzano, L'Aquila, ItalyApply NowFind out how well you match with this jobJob ID: JR114714Our vision is to transform how the world uses information to enrich life for *all*.Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Design/Senior Design Engineer – Auto Place & Route / Digital Implementation (NVE Engineering)Our vision is to transform how the world uses information to enrich life for all.Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Department IntroductionThe Non-Volatile NAND Design Engineering group is responsible for the design and optimization of analog, digital, and mixed-signal circuits enabling advanced NAND Flash memory products. Close collaboration with cross-functional teams ensures scalable, manufacturable,
and reliable solutions across technology nodes. Position OverviewAs a Digital Implementation / Auto Place & Route Engineer in the NVEG organization at Micron Semiconductor Italia, you will drive the physical implementation of advanced NAND Flash digital designs from synthesized netlist through tape-out.In this role, you will own block- and subsystem-level implementation, including floorplanning, power planning, placement, clock tree synthesis, routing, optimization, and physical sign-off. You will partner with RTL, verification, DFT, analog, custom layout, CAD, and product teams to achieve performance, power, area, reliability, and schedule targets. ResponsibilitiesResponsibilities include, but are not limited to:• Own end-to-end RTL-to-GDSII physical implementation for complex digital blocks and subsystems using automated place-and-route flows.• Develop and optimize floorplans, power dist