Lead High-Speed SerDes & PHY Validation Architect

19 ott - San Michele All'adige
Xsight Labs

Xsight Labs is seeking a Senior SerDes & High-Speed PHY Validation Engineer to lead validation for 112G PAM4 and future 224G technologies.
Per il seguente ruolo potrebbero essere richieste diverse soft skill ed esperienze. La preghiamo di consultare attentamente la panoramica riportata di seguito.
You will own test plans, perform advanced measurements, and collaborate across silicon, package, board, and system teams to drive product readiness. xysqume

The role emphasizes lab ownership, automation, and data-driven investigations, with opportunities to influence next-generation Ethernet PHY designs.

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