Ingénieur Vérification Digital H/F

19 ott - Italia
Apple

Do you like to work on ground breaking technologies that enable amazing new products? Envision what you could do here At Apple, we believe new insights have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish Apple is looking for a qualified and motivated silicon validation engineer. This position is for an engineer with experience in system validation, who understands that the tight interaction between pre-silicon design and post-silicon validation is the key to shipping quality products. In this role, you will work closely with both IC Design teams, Firmware and System teams within Apple, as we drive execution from first silicon through to mass-production release.
You will be expected to participate in all levels of this process, including the definition of custom board-level hardware for IC bring-up and test, defining and implementing validation plans, and working with module and system teams to support their design integration and debug of system-level issues.




BS/MS/PhD in Electronic Engineering or related fields
Ability to work well on a diverse team, take ownership, and motivate self and others
First experience in the areas of system validation and ASIC design validation
Experience with analog circuit measurement
Good knowledge in SW development
Good bringup and debugging skills and hands-on lab work.
Experience with complex test equipment setups (scopes, programmable power supplies, spectrum/network analyzer, etc.)
Strong coding skills (Python, C++) and data post processing knowledge
Good understanding of embedded firmware/software development process
Familiarity with switching converters and linear regulators (LDO)
Technical background in silicon validation, failure analysis and debug
Familiarity with Verilog or VHDL, FPGA prototyping is a plus
An understanding of finite state machines, microcontroller architectures and mixed signa

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