SoC Physical Design Engineer: Floorplanning, Timing

Vedi l’offerta su Go Lavoro: golavoro.it/annuncio-lavoro/8ivwqf

Nokia seeks an experienced ASIC physical design engineer to implement floorplanning, place & route, and power/clock distribution for submicron nodes. You will work with a hardware/RTL team to translate designs into silicon and optimize flows. This role emphasizes collaboration across cross-functional teams, verification rigor, and automation, with hybrid work and strong learning opportunities in latest nodes and tools.

Vedi l’offerta su Go Lavoro: golavoro.it/annuncio-lavoro/8ivwqf