Principal HS Digital Design Engineer (d/m/f)

22 ott - Pavia
Appcast

brLe interessa questa possibilità? Si candidi in fretta, è previsto un elevato volume di candidature. Scorra verso il basso per leggere la descrizione completa.brYour tasksbrullibr/liliTechnical leader responsible for architecture and RTL development of high-speed digital subsystems for communication ICs and mixed-signal SoC productsbr/liliDefine digital subsystem architecturesbr/liliLead RTL development and integrationbr/liliDrive design reviews and quality standardsbr/liliSupport verification and implementation teamsbr/liliMentor design engineersbr/li /ulWho we are looking forbrullibr/liliMSc or PhD in Electrical Engineeringbr/lili10+ years digital IC design experiencebr/liliRTL design (Verilog/SystemVerilog)br/liliHigh-speed digital IC design experience for communication or mixed-signal SoC products is required; knowledge of high-speed interfaces such as UCIe,



PCIe or similar protocols is an advantagebr/liliInterface protocols and clock-domain crossingbr/liliSynthesis and timing analysisbr/liliAdvanced CMOS node experience, including FinFET and/or FD-SOI, is requiredbr/li /ulams OSRAM is an Equal Employment Opportunity Employer. Diversity, equity and inclusion is strongly established in our corporate culture and we firmly believe it makes us more successful as a company. xjncmbx All qualified applications will receive consideration for employment regardless of ethnic, national or social origin, gender, gender identity, sexual orientation, color, religion, age, physical and mental abilities.br

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