Field Applications Engineer, Verification

Vedi l’offerta su Go Lavoro: golavoro.it/annuncio-lavoro/8md33r

h3We Are /h3pSynopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their RD capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. /ph3You Are /h3pYou have spent years in verification, close enough to the tools to know what breaks and close enough to customers to know the right answer depends on what they are actually trying to verify. You have debugged enough RTL and traced enough CDC violations to understand verification is about building confidence the design will work when it ships. /ppYou walk into customer meetings, listen to what they are stuck on, and map problems to solutions they can use. When something does not work, you reproduce it and show up with enough context that RD can fix it. You like bridging product and customer reality. At Synopsys, you will work with semiconductor teams across Europe who depend on verification tools to catch issues that would otherwise cost months in silicon. /ph3What You'll Be Doing /h3ulliSupport pre-sales demos, benchmarks, and proof-of-concept work that helps customers evaluate verification solutions /liliDeploy and troubleshoot verification tools post-sale, resolving issues with customer engineering teams /liliApply expertise in static verification using SpyGlass, formal verification with VC Formal,



or dynamic simulation using VCS and UVM /liliWork with RD to communicate customer needs and reproduce issues /liliDeliver technical workshops and training on verification technologies /liliBuild trusted relationships with engineering and management at semiconductor companies across Italy and Europe /li /ulh3The Impact You Will Have /h3ulliEnable customers to catch critical design issues earlier, reducing respins and schedule risk /liliAccelerate tool deployment by resolving blockers and providing methodology guidance /liliInfluence product roadmaps by surfacing customer requirements /liliHelp close deals by running evaluations that demonstrate value on customer designs /liliReduce support escalations by diagnosing issues and providing RD with context /li /ulh3What You'll Need /h3ulliBachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field /lili5+ years in the semiconductor industry at an EDA company or semiconductor design company /liliHands-on experience in RTL verification or verification methodology /liliStrong knowledge in static verification (SpyGlass), formal verification (VC Formal), or dynamic simulation (VCS, UVM) /liliProficiency in Verilog and SystemVerilog /liliComfort with Linux and scripting in Tcl, Python, Perl, or shell /liliFluent English; Italian language skills are a strong advantage /li /ulh3Who You Are /h3ulliYou listen to a verification problem and walk out with a plan that maps to tool features and methodology changes /liliYou reproduce issues and show up with enough detail that problems can be solved /liliYou present comfortably to engineers who want depth and managers who want to know if this will work /liliYou manage multiple customer engagements without losing track of commitments /li /ulh3Rewards and Benefits /h3pWe offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. /p #J-18808-Ljbffr

Vedi l’offerta su Go Lavoro: golavoro.it/annuncio-lavoro/8md33r