25 ott - Roma
Ams Italy
Your tasks
Technical leader responsible for architecture and RTL development of high-speed digital subsystems for communication ICs and mixed-signal SoC products
Define digital subsystem architectures
Lead RTL development and integration
Drive design reviews and quality standards
Support verification and implementation teams
Mentor design engineers
Who we are looking for
MSc or PhD in Electrical Engineering
10+ years digital IC design experience
RTL
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Schneider Electric
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Synergie Italia
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I AM
25 ott - Firenze
Burberry