26 ott - Emilia-Romagna
VisLab (an Ambarella Inc.
VisLab, an Ambarella Inc. company, in Parma, Italy, seeks a Sr. ASIC Design Engineer to develop micro-architecture for a next-generation computer vision processor and to implement Verilog/SystemVerilog modules for cutting-edge SOCs.
The ideal candidate holds a Master’s in Electrical Engineering with up to 4 years of experience and has a strong background in VLSI/ASIC design, design verification, and scripting (Python/Perl). Knowledge in image/video processing and ML is a plus.
#J-18808-Ljbffr
26 ott - San Giovanni in Persiceto
Adecco
26 ott - Savona
Fine Foods & Pharmaceuticals N.T.M.
26 ott - Pescara
Intesa Sanpaolo Group
26 ott - Ferrara
Beckman Coulter Diagnostics