27 ott - Bologna
VisLab (an Ambarella Inc.
VisLab, an Ambarella Inc. company, in Parma, Italy, seeks a Sr. ASIC Design Engineer to develop micro-architecture for a next-generation computer vision processor and to implement Verilog/SystemVerilog modules for cutting-edge SOCs. The ideal candidate holds a Master's in Electrical Engineering with up to 4 years of experience and has a strong background in VLSI/ASIC design, design verification, and scripting (Python/Perl). Knowledge in image/video processing and ML is a plus.
27 ott - Rodengo-saiano
ADHR Group
27 ott - Cesena
Archimede
27 ott - Campo di Ne
E-Work S. P. A.
27 ott - Varese
Manpower Saronno Tommaseo