27 ott - Reggio Emilia
VisLab (an Ambarella Inc.
We’re growing! Our team in Parma (Italy) is seeking a Sr. ASIC Design Engineer.Potrebbe essere proprio lei il candidato/la candidata ideale per questo lavoro. Legga tutte le informazioni associate e invii la sua candidatura.Responsibilities:Developing micro-architecture specifications for a next generation Computer Vision processor; Designing and implementing Verilog/SytemVerilog modules for cutting edge SOCs. Examples of such modules include:Video compression logicImage processing logicVector processorsDevice / Memory controllersDesign integration, logic synthesis, and design optimization for timing, area and power; Developing front-end methodologies and tool flows; Requirements:Master’s degree in Electrical Engineering with 0-4 years of experience; Very good understanding of VLSI/ASIC design,
Computer architecture and Logic design; Good knowledge and experience in using hardware description languages (Verilog/SystemVerilog); Ability to program in scripting languages, like Python and Perl; Knowledge of design verification, and functional coverage; Strong communication skills and a good team player; Knowledge xysqume of logic synthesis and timing closure is a mustKnowledge and/or experience in the areas of Image/Video processing, computer vision, machine learning are plus; As an Equal Opportunity/Affirmative Action Employer, Vislab and Ambarella recruit qualified applicants without regard to race, color, national origin, sex, physical disability, or veteran status.#J-18808-Ljbffr
28 ott - Città Metropolitana di Torino
Adecco Talent Attraction
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AXL S.p.A. Genova Business Unit
28 ott - Gravina in Puglia
IMPIANTISTICA LEONE
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TURNER & TOWNSEND PRIVATE