Senior ASIC Design Engineer

Vedi l’offerta su Go Lavoro: golavoro.it/annuncio-lavoro/8orpef

VisLab, an Ambarella Inc.

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company, in Parma, Italy, seeks a Sr.

ASIC Design Engineer to develop micro-architecture for a next-generation computer vision processor and to implement Verilog/SystemVerilog modules for cutting-edge SOCs.

The ideal candidate holds a Master’s in Electrical Engineering with up to 4 years of experience and has a strong background in VLSI/ASIC design, design verification, and scripting (Python/Perl). xysqume

Knowledge in image/video processing and ML is a plus.

Vedi l’offerta su Go Lavoro: golavoro.it/annuncio-lavoro/8orpef