28 ott - Pavia
Ams Italy
Your tasksbr/br/Technical leader responsible for architecture and RTL development of high-speed digital subsystems for communication ICs and mixed-signal SoC productsbr/br/Define digital subsystem architecturesbr/br/Lead RTL development and integrationbr/br/Drive design reviews and quality standardsbr/br/Support verification and implementation teamsbr/br/Mentor design engineersbr/br/Who we are looking forbr/br/MSc or PhD in Electrical Engineeringbr/br/10+ years digital IC design experiencebr/br/RTL design (Verilog/SystemVerilog)br/br/High-speed digital IC design experience for communication or mixed-signal SoC products is required; knowledge of high-speed interfaces such as UCIe,
PCIe or similar protocols is an advantagebr/br/Interface protocols and clock-domain crossingbr/br/Synthesis and timing analysisbr/br/Advanced CMOS node experience, including FinFET and/or FD-SOI, is requiredbr/br/ams OSRAM is an Equal Employment Opportunity Employer. Diversity, equity and inclusion is strongly established in our corporate culture and we firmly believe it makes us more successful as a company. All qualified applications will receive consideration for employment regardless of ethnic, national or social origin, gender, gender identity, sexual orientation, color, religion, age, physical and mental abilities.br/br/
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