FPGA/ASIC Design Engineer — HDL & Verification

Vedi l’offerta su Go Lavoro: golavoro.it/annuncio-lavoro/8q0mwa

Avaneidi in Lombardia is seeking an FPGA/ASIC Hardware Engineer to design, simulate, and verify digital circuits for high-performance FPGA and ASIC solutions. You will work with software teams to integrate hardware blocks into products.

Candidates should have HDL experience, strong timing analysis, and hands-on with Vivado/Quartus. The role emphasizes fast-paced collaboration and rigorous verification using testbenches and UVM.

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Vedi l’offerta su Go Lavoro: golavoro.it/annuncio-lavoro/8q0mwa