High-Speed SerDes
Xsight Labs is seeking a motivated SerDes & High-Speed PHY Validation Engineer to join our connectivity validation team and contribute to next-generation Ethernet networking solutions for AI and data center applications.
Si candidi in fretta: consulti la descrizione completa scorrendo verso il basso per scoprire tutti i requisiti di questo ruolo.
You will validate 112G PAM4 and future 224G PHY architectures, perform eye-diagram, BER, and jitter analyses, and xpavfwm collaborate with SI/PI, design and system teams to deliver robust lab-tested products.
#J-18808-Ljbffr
Si candidi in fretta: consulti la descrizione completa scorrendo verso il basso per scoprire tutti i requisiti di questo ruolo.
You will validate 112G PAM4 and future 224G PHY architectures, perform eye-diagram, BER, and jitter analyses, and xpavfwm collaborate with SI/PI, design and system teams to deliver robust lab-tested products.
#J-18808-Ljbffr