Senior analog layout engineer: drive high-performance ics
Renesas in Catania seeks a Sr Staff Layout Engineer to lead analog layout from block level to full chip, driving innovations for DC-DC converters, controllers and drivers. You will focus on floorplanning, leaf cell layout and matching techniques with emphasis on EM and reliability.
You will collaborate with global layout teams to deliver high-quality layouts, oversee DRC/LVS/Packaging flows, and push IP portability across designs while meeting schedules and quality targets.
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You will collaborate with global layout teams to deliver high-quality layouts, oversee DRC/LVS/Packaging flows, and push IP portability across designs while meeting schedules and quality targets.
#J-18808-Ljbffr