Senior digital p&r architect — high-speed ics lead
ams OSRAM is seeking a Principal HS Digital Place & Route Engineer to lead high-speed digital physical implementation from synthesis through sign-off and tape-out, in a PCIe/SerDes rich environment, based in Pavia, Italy. You will define back-end flows, drive PPA targets, and mentor a team across multiple projects.
The role requires a PhD or MSc in Electrical Engineering with 10+ years in digital backend design, strong Cadence experience, and deep knowledge of floorplanning, routing, and timing
#J-18808-Ljbffr
The role requires a PhD or MSc in Electrical Engineering with 10+ years in digital backend design, strong Cadence experience, and deep knowledge of floorplanning, routing, and timing
#J-18808-Ljbffr