Senior CMOS Analog/Mixed-Signal Designer — NVM Memory IP

Pubblicato il 01-11-2026 · Ferroelectric Memory · Agrate Brianza

Ferroelectric Memory GmbH (FMC) seeks an experienced IC Design Engineer with strong CMOS analog/mixed-signal design expertise and a focus on emerging NVM devices based on hafnium oxide technology.

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You will collaborate with international teams in Milan or Dresden to translate memory concepts into robust silicon. xysqume

Applicants should have hands-on Cadence/Verilog experience, proficiency in C and Verilog, and a solid background in analog/mixed-signal CMOS design.
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