Junior FPGA Site Engineer — Rome (On-Site)
RINA in Rome is seeking a Junior FPGA Site Engineer to join the Electronics and System Engineering Division and support FPGA-based systems development, integration, and testing in a highly technical environment.
The role requires a Master’s in Electronics, knowledge of VHDL/Verilog, and familiarity with Libero SoC and FPGA tools. The position offers a competitive gross salary range and a welfare package.
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The role requires a Master’s in Electronics, knowledge of VHDL/Verilog, and familiarity with Libero SoC and FPGA tools. The position offers a competitive gross salary range and a welfare package.
#J-18808-Ljbffr