Senior Functional Verification Engineer — Hybrid
Openchip & Software Technologies S.L.
Le informazioni riportate di seguito illustrano i requisiti del ruolo, l'esperienza richiesta ai candidati e le qualifiche associate.
in Rome, Italy, seeks a Senior Functional Verification Engineer to lead verification across HW/SW interfaces, using SystemVerilog/UVM, SystemC/C++, and advanced verification techniques.
You will collaborate with architecture, design and software teams to ensure highest performance, with a hybrid work model in Rome and opportunities for mentoring.
Strong English and a Master’s degree plus 7+ years in SoC/IP verification are expected. xysqume
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Per questa posizione sono disponibili opzioni di lavoro a distanza/a casa.
Le informazioni riportate di seguito illustrano i requisiti del ruolo, l'esperienza richiesta ai candidati e le qualifiche associate.
in Rome, Italy, seeks a Senior Functional Verification Engineer to lead verification across HW/SW interfaces, using SystemVerilog/UVM, SystemC/C++, and advanced verification techniques.
You will collaborate with architecture, design and software teams to ensure highest performance, with a hybrid work model in Rome and opportunities for mentoring.
Strong English and a Master’s degree plus 7+ years in SoC/IP verification are expected. xysqume
#J-18808-Ljbffr
Per questa posizione sono disponibili opzioni di lavoro a distanza/a casa.