Senior Digital IC Design Engineer (RTL/Verilog)
NXP Semiconductors in Italy (Catania) is seeking a Master’s-level IC design engineer to develop digital sub-circuits for SOCs using Verilog/SystemVerilog, RTL techniques and advanced verification.
Consulti la panoramica del ruolo qui sotto. Se è protetto/a di possedere le giuste competenze ed esperienze, si candidi oggi stesso.
You will collaborate with analog, mixed-signal and software teams to optimize interfaces, perform design verification, xjncmbx participate in post-silicon validation and contribute to high-quality, testable ICs.
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Consulti la panoramica del ruolo qui sotto. Se è protetto/a di possedere le giuste competenze ed esperienze, si candidi oggi stesso.
You will collaborate with analog, mixed-signal and software teams to optimize interfaces, perform design verification, xjncmbx participate in post-silicon validation and contribute to high-quality, testable ICs.
#J-18808-Ljbffr