Chip-Package Reliability

Pubblicato il 04-11-2026 · Strategic Micro Systems of NJ · Agrate Brianza

STMicroelectronics in Italy is offering a role focused on developing and qualifying pad/pad over active structures for Smart Power processes. You will validate CPI for new technology platforms and run thermo-mechanical simulations to guide design improvements, ensuring robust chip-package interactions.

The ideal candidate holds a Master’s degree in a relevant field, with strong FE/BE knowledge, FEM tooling proficiency, and business-level English.
Max. 8 MB. Formati Accettati: PDF, RTF, DOC, DOCX, ODT.