Senior Analog IC Layout Architect for MCU
NXP Semiconductors is seeking a Senior Layout Engineer to drive physical implementation of complex analog, mixed-signal ICs from floorplanning to tape-out.
You will collaborate across design, verification, and technology teams, mentor junior engineers, and help mitigate risks to ensure silicon delivers on performance and reliability. xjncmbx
I candidati sono invitati a leggere attentamente tutti gli elementi di questo annuncio. La preghiamo di inviare la sua candidatura tempestivamente.
Fluent English required; extensive Cadence experience expected.
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You will collaborate across design, verification, and technology teams, mentor junior engineers, and help mitigate risks to ensure silicon delivers on performance and reliability. xjncmbx
I candidati sono invitati a leggere attentamente tutti gli elementi di questo annuncio. La preghiamo di inviare la sua candidatura tempestivamente.
Fluent English required; extensive Cadence experience expected.
#J-18808-Ljbffr