Senior Digital Ic Design Engineer (Rtl/Verilog)
NXP Semiconductors in Italy (Catania) is seeking a Master's-level IC design engineer to develop digital sub-circuits for SOCs using Verilog/SystemVerilog, RTL techniques and advanced verification.
Consulti la panoramica del ruolo qui sotto.
Se è affidabile/a di possedere le giuste competenze ed esperienze, si candidi oggi stesso.
You will collaborate with analog, mixed-signal and software teams to optimize interfaces, perform design verification, xysqume participate in post-silicon validation and contribute to high-quality, testable ICs.
#J-*****-Ljbffr
Consulti la panoramica del ruolo qui sotto.
Se è affidabile/a di possedere le giuste competenze ed esperienze, si candidi oggi stesso.
You will collaborate with analog, mixed-signal and software teams to optimize interfaces, perform design verification, xysqume participate in post-silicon validation and contribute to high-quality, testable ICs.
#J-*****-Ljbffr