Principal Hs Digital Design Engineer (d/m/f)

Pubblicato il 06-11-2026 · Appcast · Pavia

Your tasksTechnical leader responsible for architecture and RTL development of high-speed digital subsystems for communication ICs and mixed-signal So C products Define digital subsystem architectures Lead RTL development and integration Drive design reviews and quality standards Support verification and implementation teams Mentor design engineers Who we are looking for
Max. 8 MB. Formati Accettati: PDF, RTF, DOC, DOCX, ODT.