Senior Mixed-Signal Verification Lead – Soc
NXP Semiconductors NV in Italy seeks a Mixed Signal Verification Lead in Catania to drive verification strategy for mixed-signal designs and systems.
You will create verification plans, traceability from requirements, and functional AMS/SystemVerilog models for SoC verification.
The ideal candidate has a Bachelor's in Electronic Engineering (Master's preferred), 10+ years in production mixed-signal verification, SystemVerilog modeling experience, and strong communication and teamwork skills.
#J-*-Ljbffr
You will create verification plans, traceability from requirements, and functional AMS/SystemVerilog models for SoC verification.
The ideal candidate has a Bachelor's in Electronic Engineering (Master's preferred), 10+ years in production mixed-signal verification, SystemVerilog modeling experience, and strong communication and teamwork skills.
#J-*-Ljbffr