Principal Hs Digital Design Engineer (D/M/F)

Pubblicato il 06-11-2026 · Appcast · Pavia

Your tasksTechnical leader responsible for architecture and RTL development of high-speed digital subsystems for communication ICs and mixed-signal So C productsDefine digital subsystem architecturesLead RTL development and integrationDrive design reviews and quality standardsSupport verification and implementation teamsMentor design engineersWho we are looking for
Max. 8 MB. Formati Accettati: PDF, RTF, DOC, DOCX, ODT.