Senior IC Lead – Analog / Mixed-Signal | Milan

Pubblicato il 09-11-2026 · MRL Consulting Group · Milano

Overview In this role you will own IC development from architecture to tape-out, driving silicon programs and shaping the next generation of hardware. You will lead a small, highly technical IC team while staying hands-on, overseeing design, verification, bring-up, and productisation. The position sits at a Milan-based, early-stage semiconductor company focused on ultra-low-power AI for edge applications. This is a hands-on leadership role with a clear impact on technology strategy and team growth.

Retribuzione / Benefits

Hybrid Milan location Employee Stock Option Plan (ESOP)

Responsabilità

Lead analog and mixed-signal IC design initiatives Manage silicon programmes from architecture through tape-out Guide multiple silicon revisions and design decisions Oversee schematic design and layout reviews Perform PVT and Monte Carlo analyses Coordinate verification and sign-off activities Lead silicon bring-up, debugging and characterization Collaborate with foundries, EDA providers, packaging, test and external partners Ensure manufacturability, testability, yield,



and product requirements Build and mentor a small, highly technical IC team Contribute to the future silicon roadmap

Requisiti fondamentali

Strong Analog / Mixed-Signal IC design experience Experience taking silicon through multiple tape-outs Experience owning or leading multiple silicon programmes Solid knowledge of schematic design, layout, verification and sign-off Experience with PVT / Monte Carlo analysis Silicon bring-up and characterization experience Experience working with foundries and external semiconductor partners Understanding of silicon productisation Experience leading a small technical team while remaining hands-on Interest in working in an early-stage semiconductor environment Hands-on leadership Cross-functional collaboration Problem-solving under fast-moving startup conditions Analog / Mixed-Signal IC design Tape-out execution across multiple iterations Schematic design, layout review, verification and sign-off
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