Senior High-Speed Digital Design Architect

30 set - Piove di Sacco
Ams Italy

pAms Italy S.R.L. seeks a Technical leader for RTL architecture and high-speed digital subsystems in its Piove di Sacco, Veneto operations. /ppYou will spearhead RTL development and integration, and drive design reviews to ensure quality across the project. Requirements include MSc/PhD in Electrical Engineering and 10+ years in digital IC design, with experience in high-speed interfaces such as UCIe/PCIe, clock-domain crossing, and synthesis/timing analysis, plus advanced CMOS nodes like FinFET or /p #J-18808-Ljbffr

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